A more recent development in semiconductor memory devices involves spin electronics, which combines semiconductor technology and magnetics. The spin of an electron, rather than the charge, is used to indicate the presence of a “1” or “0”. One such spin electronic device is a magnetic random access memory (MRAM), which includes conductive lines positioned in a different direction, e.g., perpendicular to one another in different metal layers, the conductive lines sandwiching a magnetic stack or magnetic tunnel junction (MJT), which functions as a magnetic memory cell. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a “0” or “1”, is storable in the alignment of magnetic moments. The resistance of the magnetic memory cell depends on the moment's alignment. The stored state is read from the magnetic memory cell by detecting the component's resistive state.
An advantage of MRAMs compared to traditional semiconductor memory devices such as dynamic random access memory devices (DRAMs) is that MRAMs are non-volatile. For example, a personal computer (PC) utilizing MRAMs would not have a long “boot-up” time as with conventional PCs that utilize DRAMs. Also, an MRAM does not need to be powered up and has the capability of “remembering” the stored data. Therefore, MRAM devices are replacing flash memory, DRAM and static random access memory devices (SRAM) devices in electronic applications where a memory device is needed.
A magnetic stack comprises many different layers of metals and magnetic metals, and a thin layer of dielectric material having a total thickness of a few tens of nanometers. The magnetic stacks are typically built on top of copper wires embedded in an inter-level dielectric (ILD) material. The magnetic tunnel junctions (MTJ's) are positioned at intersections of underlying first conductive lines and overlying second conductive lines. MRAM devices are typically manufactured by forming a plurality of magnetic metal stacks arranged in an array, which comprise the magnetic memory cells. A memory cell array typically has conductive lines in a matrix structure having rows and columns.
One type of MRAM array uses a transistor to select each magnetic memory cell. Another type, a cross-point array, comprises an array of magnetic bits or magnetic stacks situated at the cross-points between two conductive lines. Information is stored in one of the magnetic layers of the magnetic stacks. To store the information, a magnetic field is necessary. In a cross-point array, this magnetic field is provided by a word line and bit line current which is passed through conductive lines. Information is stored in the magnetic memory cells by aligning the magnetization of one ferromagnetic layer (the information layer or free layer) either parallel or antiparallel to a second magnetic layer (the reference layer or fixed layer). The information is detectable due to the fact that the resistance of the element in the parallel case is different from the antiparallel case. Magnetic stacks or memory cells in a cross-point array are written by passing currents through the conductive lines, e.g., in both the x- and y-direction, and where the conductive lines cross at the cross-points, the combined magnetic field is large enough to change the magnetic orientation.
A problem in cross-point MRAM arrays is that if a voltage potential is applied across a selected MJT (e.g., the MTJ being written to) during a write operation, this can create stress on the MTJ and possibly destroy the MTJ. The dielectric layer of the MTJ is thin and delicate and may be destroyed if a voltage is applied across the MTJ. Furthermore, if a voltage potential is applied across unselected MTJ's during a write operation, this can cause leakage current through the unselected MTJ, which increases power consumption.
Leakage current is particularly a problem for MTJ's along a conductive line being written. If there is leakage current through unselected MTJ's on a conductive line being written, this consumes some of the write current, causing different magnetic fields to be generated from the write current for each MTJ along a particular conductive line. Generating different magnetic fields decreases the write margin.
Therefore, what is needed in the art is a cross-point MRAM array design with a reduced voltage drop across the MTJ's.